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CPU microarchitectural core vs. microprocessor/SoC die/package codenames
I added several CPU codenames and removed several die codenames, however, I believe more should probably be done such as in the P6 space (adding Pentium M vs. Banias/Dothan and Enhanced Pentium M vs. Yonah). I understand things get a bit sketchy that far back but at least for now and immediate future I believe the CPU microarchitectural cores should not be conflated with the microprocessor/SoC dies/packages. 50.53.15.59 (talk) 13:39, 26 August 2013 (UTC)[reply]
It's too cumbersome to edit the SVG every time the diagram is changed (I wish it was editable like text). So I'm considering using the aforementioned alternate mechanisms. EasyTimeline is not easy at all though, and I don't think it supports non-linear scales. Graphical Timeline is a template monster of dimensions too. I like the EasyTimeline syntax, but the semantics (almost every attribute is mandatory) and it looks bad. --Ysangkok (talk) 00:43, 27 August 2013 (UTC)[reply]
@Dsimic: the existing horizontal table (as drawn from the original SVG) is starting to become unwieldy as Intel adds more architectures. I propose a vertical format table, but this will require some more careful editing to add new architectures in the future. See my proposed vertical format at the template sandbox, which includes a more fully fleshed-out documentation. Cheers, Mliu92 (talk) 15:09, 30 June 2016 (UTC)[reply]
Hello! The vertical layout you've proposed does look better, and I don't find the additional editing complexity as a potential downside. The only thing preventing me from saying "yay!" is the amount of whitespace we'd have in the infobox that way, so I'd like to hear opinions from other editors, if you agree. Thank you for preparing the proposal in the first place! — Dsimic (talk | contribs) 18:15, 3 July 2016 (UTC)[reply]
Not sure if it should be added since it seems to be for servers. Atm the template is ordered by structure size instead of time. So if this is kept, Cascade Lake would go between Whiskey Lake and Cannon Lake. Chronological order might be less confusing though, in this case Cannon Lake would need to be moved between Coffee Lake and Whiskey Lake while making it clear that Cannon Lake is 10 nm.--Pizzahut2 (talk) 01:02, 9 April 2019 (UTC)[reply]
Should this be on new row since it's system on chip vice just a cpu? --GSMC(Chief Mike) Kouklis U.S.NAVY Ret. ⛮🇺🇸 / 🇵🇭🌴 10:46, 21 April 2019 (UTC) — Preceding unsigned comment added by Mkouklis(2) (talk • contribs)
The cleanup tag on this template is causing all the articles that use it to be marked for cleanup. Is there a better way to do this? RJFJR (talk) 22:02, 3 November 2019 (UTC)[reply]
Can & should the processor families which are only for laptop (such Amber Lake, Whiskey Lake, Cannon Lake) be displayed in the table?
Can & should the processor families which are only for server or workstation (such Cascade Lake, Cooper Lake, Sapphire Rapids) be displayed in the table?
To be honest it's the first time I see this template. Where is it used? I'm not against laptop and server architectures but to be honest I'd only leave basic architectures and forget about iterations, e.g. SkyLake has a ton of descendants which are still SkyLake (Kaby, Coffer, Comet, Whisky, etc.) with minor improvements. Artem S. Tashkinov (talk) 05:34, 24 February 2022 (UTC)[reply]