Worst-case distance

View of the performance space with the performance acceptance region A and the distribution of performance (red) under statistical and operational variations, from which WCD can be calculated. Note: The statistical variables themselves are often uncorrelated, but the performances are correlated (as indicated by the stretch and rotation of the ellipsoids). Specifications are often defined by upper or lower limits, represented as straight lines. In the statistical variable space, specification limits typically take nonlinear shapes. WCD incorporates both perspectives in addressing the yield problem.

Worst-case distance (WCD) is a robustness metric used in electronic design for yield optimization and design centering.[1] The metric quantifies how well electronic systems and devices can tolerate parameter variations and operating condition changes.[2]

CD extends traditional yield optimization approaches beyond simple cases involving normal distributions and single specifications. In semiconductor fabrication, yield represents the ratio of functional devices to total devices produced. While conventional methods calculate yield by expressing design margins in terms of standard deviations (sigma) for normally distributed parameters, WCD addresses more complex scenarios involving non-normal distributions and multiple interdependent specifications.

Factors

In yield optimization for electronic circuit design, WCD relates the following yield-influencing factors:

  • Statistical distribution of design parameters, typically based on the technology process
  • Operating range of conditions under which the design will function
  • Performance specification for performance parameters

Although the strict mathematical formalism is complex, in a simplified interpretation, WCD is the maximum of all possible performance variances (i.e., within specification limits) divided by the distance to the performance specification, with the performance variances evaluated within the space defined by the operating range.

References

  1. ^ Antreich, K.; Graeb, H. E. & Wieser, C. U. (1994), 'Circuit analysis and optimization driven by worst-case distances.', IEEE Trans. on CAD of Integrated Circuits and Systems 13 (1), 57-71.
  2. ^ T Nirmaier; J Kirscher; Z Maksut; M Harrant; M Rafaila; G Pelz (2013). "Robustness Metrics for Automotive Power Microelectronics" (PDF). Design, Automation and Test in Europe, RIIF Workshop. Grenoble.
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